diff options
| author | Christian Cunningham <cc@localhost> | 2022-08-18 18:21:13 -0700 |
|---|---|---|
| committer | Christian Cunningham <cc@localhost> | 2022-08-18 18:21:13 -0700 |
| commit | 6f1e6acb1a9775eef4b0d8879c102df86e207687 (patch) | |
| tree | 0ec9c8102b4ddb96c789eaebd8abba2b7ebaf63a /src/uart.rs | |
| parent | 5494645e2607706655f8e3466f3ec858db303061 (diff) | |
Assembly stuff
Diffstat (limited to 'src/uart.rs')
| -rw-r--r-- | src/uart.rs | 56 |
1 files changed, 29 insertions, 27 deletions
diff --git a/src/uart.rs b/src/uart.rs index 7c048e0..a26bb2f 100644 --- a/src/uart.rs +++ b/src/uart.rs @@ -1,31 +1,33 @@ -pub unsafe fn uart_init() { - let UART0_CR = 0x3F201030 as *mut u32; - let UART0_ICR = 0x3F201044 as *mut u32; - let UART0_IBRD = 0x3F201024 as *mut u32; - let UART0_FBRD = 0x3F201028 as *mut u32; - let UART0_LCRH = 0x3F20102C as *mut u32; - let UART0_IMSC = 0x3F201038 as *mut u32; - let GPPUD = 0x3F200094 as *mut u32; - let GPPUDCLK0 = 0x3F200098 as *mut u32; - *UART0_CR = 0; - *GPPUD = 0; - for _ in 0..150 {core::arch::asm!("nop", options(nomem, nostack));} - *GPPUDCLK0 = (1 << 14) | (1 << 15); - for _ in 0..150 {core::arch::asm!("nop", options(nomem, nostack));} - *GPPUDCLK0 = 0; - *UART0_ICR = 0x7FF; - *UART0_IBRD = 9; - *UART0_FBRD = 49; - *UART0_LCRH = (1<<4)|(1<<5)|(1<<6); - *UART0_IMSC = (1<<1)|(1<<4)|(1<<5)|(1<<6)|(1<<7)|(1<<8)|(1<<9)|(1<<10); - *UART0_CR = (1<<0) | (1<<8) | (1<<9); +use crate::cpu::*; +const UART0_DR: u32 = 0x3F201000; +const UART0_FR: u32 = 0x3F201018; +const UART0_CR: u32 = 0x3F201030; +const UART0_ICR: u32 = 0x3F201044; +const UART0_IBRD: u32 = 0x3F201024; +const UART0_FBRD: u32 = 0x3F201028; +const UART0_LCRH: u32 = 0x3F20102C; +const UART0_IMSC: u32 = 0x3F201038; +const GPPUD: u32 = 0x3F200094; +const GPPUDCLK0: u32 = 0x3F200098; + +pub fn uart_init() { + store32(UART0_CR, 0); + store32(GPPUD, 0); + spin_for_n_cycles(150); + store32(GPPUDCLK0, (1 << 14) | (1 << 15)); + spin_for_n_cycles(150); + store32(GPPUDCLK0, 0); + store32(UART0_ICR, 0x7FF); + store32(UART0_IBRD, 9); + store32(UART0_FBRD, 49); + store32(UART0_LCRH, (1<<4) | (1<<5) | (1<<6)); + store32(UART0_IMSC, (1<<1) | (1<<4) | (1<<5) | (1<<6) | (1<<7) | (1<<8) | (1<<9) | (1<<10)); + store32(UART0_CR, (1<<0) | (1<<8) | (1<<9)); } pub fn write_char(ch: u8) { - let UART0_DR = 0x3F201000 as *mut u32; - let UART0_FR = 0x3F201018 as *mut u32; - unsafe { - while *UART0_FR & 0x20 != 0 {core::arch::asm!("nop", options(nomem, nostack));} - *UART0_DR = ch as u32; - } + while load32(UART0_FR) & 0x20 != 0 { + nop(); + } + store32(UART0_DR, ch as u32); } |