From 91d0ae783e51062f77b120b05c97cd352b9b86d5 Mon Sep 17 00:00:00 2001 From: Christian Cunningham Date: Wed, 17 Aug 2022 22:14:15 -0700 Subject: Initial commit --- src/uart.rs | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 src/uart.rs (limited to 'src/uart.rs') diff --git a/src/uart.rs b/src/uart.rs new file mode 100644 index 0000000..7c048e0 --- /dev/null +++ b/src/uart.rs @@ -0,0 +1,31 @@ +pub unsafe fn uart_init() { + let UART0_CR = 0x3F201030 as *mut u32; + let UART0_ICR = 0x3F201044 as *mut u32; + let UART0_IBRD = 0x3F201024 as *mut u32; + let UART0_FBRD = 0x3F201028 as *mut u32; + let UART0_LCRH = 0x3F20102C as *mut u32; + let UART0_IMSC = 0x3F201038 as *mut u32; + let GPPUD = 0x3F200094 as *mut u32; + let GPPUDCLK0 = 0x3F200098 as *mut u32; + *UART0_CR = 0; + *GPPUD = 0; + for _ in 0..150 {core::arch::asm!("nop", options(nomem, nostack));} + *GPPUDCLK0 = (1 << 14) | (1 << 15); + for _ in 0..150 {core::arch::asm!("nop", options(nomem, nostack));} + *GPPUDCLK0 = 0; + *UART0_ICR = 0x7FF; + *UART0_IBRD = 9; + *UART0_FBRD = 49; + *UART0_LCRH = (1<<4)|(1<<5)|(1<<6); + *UART0_IMSC = (1<<1)|(1<<4)|(1<<5)|(1<<6)|(1<<7)|(1<<8)|(1<<9)|(1<<10); + *UART0_CR = (1<<0) | (1<<8) | (1<<9); +} + +pub fn write_char(ch: u8) { + let UART0_DR = 0x3F201000 as *mut u32; + let UART0_FR = 0x3F201018 as *mut u32; + unsafe { + while *UART0_FR & 0x20 != 0 {core::arch::asm!("nop", options(nomem, nostack));} + *UART0_DR = ch as u32; + } +} -- cgit v1.2.1