1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
|
#include <cpu.h>
#include <cpu/irq.h>
#include <globals.h>
#include <graphics/lfb.h>
#include <symbols.h>
#include <sys/core.h>
#include <sys/schedule.h>
#include <tests/test.h>
#include <util/mutex.h>
#include <util/status.h>
#include <util/time.h>
#include <usr/main.h>
#define CPS 1000
static unsigned long counter = 0;
unsigned long c_irq_handler(void)
{
unsigned long source = load32(CORE0_IRQ_SOURCE);
// Check if GPU Interrupt
if (source & (1 << 8)) {
// Check if UART Interrupt
if(load32(IRQ_PENDING2) & (1 << 25)) {
// Check if UART Interrupt is Masked
if(load32(UART0_MIS) & (1<<4)) {
// Get the UART data
unsigned long data = load32(UART0_DR);
// Handle the recieved data
#ifdef DEBUG
// Ctrl+G to output scheduler debug info
if (data == 0x7) {
uart_scheduler();
uart_mutexes();
}
#endif
// Add task to handle the data
if (irqs[UART_IRQ].handler != 0) {
struct UartInfo* uart_info = irqs[UART_IRQ].handler_info;
add_thread(irqs[UART_IRQ].handler, (void*)data, uart_info->priority);
return 1;
}
}
}
// Check if System Time Compare 0 Triggered the Interrupt
if (*(volatile unsigned long*)SYS_TIMER_CS & SYS_TIMER_SC_M0 && irqs[SYS_TIMER_0_IRQ].handler != 0) {
volatile unsigned long* timer_cs = (volatile unsigned long*)SYS_TIMER_CS;
volatile unsigned long* timer_chi = (volatile unsigned long*)SYS_TIMER_CHI;
volatile unsigned long* nexttime = (volatile unsigned long*)SYS_TIMER_C0;
struct SysTimerInfo* stinfo = irqs[SYS_TIMER_0_IRQ].handler_info;
add_thread(irqs[SYS_TIMER_0_IRQ].handler, stinfo->arg, stinfo->priority);
*nexttime = *timer_chi + stinfo->tick_rate;
*timer_cs = SYS_TIMER_SC_M0;
return 1;
}
// Check if System Time Compare 1 Triggered the Interrupt
if (*(volatile unsigned long*)SYS_TIMER_CS & SYS_TIMER_SC_M1 && irqs[SYS_TIMER_1_IRQ].handler != 0) {
volatile unsigned long* timer_cs = (volatile unsigned long*)SYS_TIMER_CS;
volatile unsigned long* timer_chi = (volatile unsigned long*)SYS_TIMER_CHI;
volatile unsigned long* nexttime = (volatile unsigned long*)SYS_TIMER_C1;
struct SysTimerInfo* stinfo = irqs[SYS_TIMER_1_IRQ].handler_info;
add_thread(irqs[SYS_TIMER_1_IRQ].handler, stinfo->arg, stinfo->priority);
*nexttime = *timer_chi + stinfo->tick_rate;
*timer_cs = SYS_TIMER_SC_M1;
return 1;
}
// Check if System Time Compare 2 Triggered the Interrupt
if (*(volatile unsigned long*)SYS_TIMER_CS & SYS_TIMER_SC_M2 && irqs[SYS_TIMER_2_IRQ].handler != 0) {
volatile unsigned long* timer_cs = (volatile unsigned long*)SYS_TIMER_CS;
volatile unsigned long* timer_chi = (volatile unsigned long*)SYS_TIMER_CHI;
volatile unsigned long* nexttime = (volatile unsigned long*)SYS_TIMER_C2;
struct SysTimerInfo* stinfo = irqs[SYS_TIMER_2_IRQ].handler_info;
add_thread(irqs[SYS_TIMER_2_IRQ].handler, stinfo->arg, stinfo->priority);
*nexttime = *timer_chi + stinfo->tick_rate;
*timer_cs = SYS_TIMER_SC_M2;
return 1;
}
// Check if System Time Compare 3 Triggered the Interrupt
if (*(volatile unsigned long*)SYS_TIMER_CS & SYS_TIMER_SC_M3 && irqs[SYS_TIMER_3_IRQ].handler != 0) {
volatile unsigned long* timer_cs = (volatile unsigned long*)SYS_TIMER_CS;
volatile unsigned long* timer_chi = (volatile unsigned long*)SYS_TIMER_CHI;
volatile unsigned long* nexttime = (volatile unsigned long*)SYS_TIMER_C3;
struct SysTimerInfo* stinfo = irqs[SYS_TIMER_3_IRQ].handler_info;
add_thread(irqs[SYS_TIMER_3_IRQ].handler, stinfo->arg, stinfo->priority);
*nexttime = *timer_chi + stinfo->tick_rate;
*timer_cs = SYS_TIMER_SC_M3;
return 1;
}
}
// Check if CNTV triggered the interrupt
else if (source & (1 << 3)) {
// Reset the counter
write_cntv_tval(cntfrq);
counter++;
if (counter % 0x6000 == 0)
counter = 0;
}
return 0;
}
unsigned long c_fiq_handler(void)
{
unsigned long source = load32(CORE0_FIQ_SOURCE);
// Check if CNTV triggered the interrupt
if (source & (1 << 3) && irqs[LOCAL_TIMER_IRQ].handler != 0) {
add_thread(irqs[LOCAL_TIMER_IRQ].handler, 0, 1);
write_cntv_tval(cntfrq);
}
return 0;
}
void subscribe_irq(unsigned long irq_num, void* handler, void* handler_info)
{
if (irq_num >= MAX_IRQS)
return;
irqs[irq_num].handler = handler;
irqs[irq_num].handler_info = handler_info;
switch (irq_num) {
case UART_IRQ:
store32(1<<4, UART0_IMSC);
store32(1<<25, IRQ_ENABLE2);
break;
case SYS_TIMER_0_IRQ:
store32(SYS_TIMER_SC_M0, IRQ_ENABLE1);
*(volatile unsigned long*)SYS_TIMER_C0 = *(volatile unsigned long*)SYS_TIMER_CHI + *(unsigned long*)handler_info;
break;
case SYS_TIMER_1_IRQ:
store32(SYS_TIMER_SC_M1, IRQ_ENABLE1);
*(volatile unsigned long*)SYS_TIMER_C1 = *(volatile unsigned long*)SYS_TIMER_CHI + *(unsigned long*)handler_info;
break;
case SYS_TIMER_2_IRQ:
store32(SYS_TIMER_SC_M2, IRQ_ENABLE1);
*(volatile unsigned long*)SYS_TIMER_C2 = *(volatile unsigned long*)SYS_TIMER_CHI + *(unsigned long*)handler_info;
break;
case SYS_TIMER_3_IRQ:
store32(SYS_TIMER_SC_M3, IRQ_ENABLE1);
*(volatile unsigned long*)SYS_TIMER_C3 = *(volatile unsigned long*)SYS_TIMER_CHI + *(unsigned long*)handler_info;
break;
case LOCAL_TIMER_IRQ:
store32(0x80, CORE0_TIMER_IRQCNTL);
sys0(SYS_ENABLE_CNTV);
break;
}
}
void unsubscribe_irq(unsigned long irq_num)
{
if (irq_num >= MAX_IRQS)
return;
irqs[irq_num].handler = 0;
irqs[irq_num].handler_info = 0;
switch (irq_num) {
case UART_IRQ:
store32(1<<25, IRQ_DISABLE2);
break;
case SYS_TIMER_0_IRQ:
store32(SYS_TIMER_SC_M0, IRQ_DISABLE1);
break;
case SYS_TIMER_1_IRQ:
store32(SYS_TIMER_SC_M1, IRQ_DISABLE1);
break;
case SYS_TIMER_2_IRQ:
store32(SYS_TIMER_SC_M2, IRQ_DISABLE1);
break;
case SYS_TIMER_3_IRQ:
store32(SYS_TIMER_SC_M3, IRQ_DISABLE1);
break;
case LOCAL_TIMER_IRQ:
store32(0x00, CORE0_TIMER_IRQCNTL);
sys0(SYS_DISABLE_CNTV);
break;
}
}
|
